14 research outputs found

    ACP Semantics for Petri Nets

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    The paper deals with algebraic semantics for Petri nets, based on process algebra ACP. The semantics is defined by assigning a special variable to every place of given Petri net, expressing the process initiated in the place. Algebraic semantics of the Petri net is then defined as a parallel composition of all the variables, where corresponding places hold tokens within the initial marking. Resulting algebraic specification preserves operational behavior of the original net-based specification

    A SUPPORT TOOL FOR THE REACHABILITY AND OTHER PETRI NETS- RELATED PROBLEMS AND FORMAL DESIGN AND ANALYSIS OF DISCRETE SYSTEMS

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    Annotation. In this paper we deal with the PNtool - a tool for a design, analysis and development of concurrent and time-critical systems specified using the Petri nets (PN) formalism. The PNtool supports four Petri nets dialects: Generalized Petri nets, Time-basic nets, Evaluative and Coloured Petri nets. The tool allows to design and simulate a system using any of the supported PN dialects and to perform an invariants-based analysis and reachability analysis for Generalized PN. Each Generalized and Evaluative PN can be also loaded from and saved in a standard interchange format called PNML. The tool is implemented in Java as a part of the mFDT Environment (mFDTE). The mFDTE is a toolset for the formal design and analysis of concurrent discrete and time-critical systems, developed at the home institution of the authors. It integrates three formal methods with complementary features: Petri nets, process algebra and B-Method. This paper also describes interfaces, which connect the PNtool with other parts of mFDTE. The work presented is supported by the grants No. 1/3140/06 and No. 1/4073/07 of the VEGA- The Scientific Grant Agency of Slovakia and NATO CLG 982698 grant.\ud \ud В статье идёт речь о проґраммном средстве – PNtool, предназначенным для синтеза и анализа параллельных и критических во времени систем, которые описываются с помощью формализма сетей Петри (СП). PNtool предназначен для поддержки четырёх диалоґов СП: обобщённые СП (generalized PN), временно- базисные СП (Time-basic PN), эвалюационные СП (evaluative PN) и раскрашенные СП (Coloured PN). PNtool позволяет конструирование и симуляцию системы с применением любоґо из упомянутых диалектов СП и также проделать анализ системы с целью одержания её инвариантов , и решения проблемы достижимости для системы представленной обобщённой СП.Спецификация систем на языке обобщённых, или эвалюационных СП может быть представлена и сохраняться в формате PNML.PNtool реализован на языке JAVA, как одна из частей проґраммной среды mFDTE (multi FDT Environment). Среда mFDTE предназначена для синтеза и анализа параллельных (concurrent) дискретных систем , включая и временно-критические системы. Проґраммная среда mFDTE создана в університете авторов статьи. В ней интеґрированы три формальных метода, которые обладают взаимно-комплементарными свойствами: СП, процессные алґебры и метод B AMN. В статье описываются интерфейсы связывающие PNtool с остальными частями среды mFDTE. Результаты исследований представленные в статье были достиґнуты при поддержке грантов № 1/3140/06 , № 1/4073/07 VEGA – научного грантового агентства Словакии, и гранта NATO CLG 982698.\u

    Securing Distributed Computer Systems Using an Advanced Sophisticated Hybrid Honeypot Technology

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    Computer system security is the fastest developing segment in information technology. The conventional approach to system security is mostly aimed at protecting the system, while current trends are focusing on more aggressive forms of protection against potential attackers and intruders. One of the forms of protection is also the application of advanced technology based on the principle of baits - honeypots. Honeypots are specialized devices aimed at slowing down or diverting the attention of attackers from the critical system resources to allow future examination of the methods and tools used by the attackers. Currently, most honeypots are being configured and managed statically. This paper deals with the design of a sophisticated hybrid honeypot and its properties having in mind enhancing computer system security. The architecture of a sophisticated hybrid honeypot is represented by a single device capable of adapting to a constantly changing environment by using active and passive scanning techniques, which mitigate the disadvantages of low-interaction and high-interaction honeypots. The low-interaction honeypot serves as a proxy for multiple IP addresses and filters out traffic beyond concern, while the high-interaction honeypot provides an optimum level of interaction. The proposed architecture employing the prototype of a hybrid honeypot featuring autonomous operation should represent a security mechanism minimizing the disadvantages of intrusion detection systems and can be used as a solution to increase the security of a distributed computer system rapidly, both autonomously and in real-time

    Comparison of Filter Techniques for Two-Step Feature Selection

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    In the last decade, the processing of the high dimensional data became inevitable task in many areas of research and daily life. Feature selection (FS), as part of the data processing methodology, is an important step in knowledge discovery. This paper proposes nine variation of two-step feature selection approach with filter FS employed in the first step and exhaustive search in the second step. The performance of the proposed methods is comparatively analysed from the stability and predictive performance point of view. As the obtained results indicate the choice of the filter FS in the first stage has strong influence on the resulting stability. Here, the choice of univariate Pearson correlation coefficient based FS method appears to provide the most stable results

    Agent-Based Model of the Spectrum Auctions with Sensing Imperfections in Dynamic Spectrum Access Networks

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    Cognitive radio (CR) is the underlying platform for the application of dynamic spectrum access (DSA) networks. Although the auction theory and spectrum trading mechanisms have been discussed in the CR related works, their joint techno-economic impact on the efficiency of distributed CR networks has not been researched yet. In this paper we assume heterogeneous primary channels with network availability statistics unknown to each secondary user (SU) terminal. In order to detect the idle primary user (PU) network channels, the SU terminals trigger regularly the spectrum sensing mechanism and make the cooperative decision regarding the channel status at the fusion center. The imperfections of the spectrum mechanism create the possibility of the channel collision, resulting in the existence of the risk (in terms of user collision) in the network. The spectrum trading within SU network is governed by the application of the sealed-bid first-price auction, which takes into account the channel valuation as well as the statistical probability of the risk existence. In order to maximize the long-term payoff, the SU terminals take an advantage of the reinforcement comparison strategy. The results demonstrate that in the investigated model, total revenue and total payoff of the SU operator (auctioneer) and SU terminals (bidders) are characterized by the existence of the global optimum, thus there exists the optimal sensing time guaranteeing the optimum economic factors for both SU operator and SU terminals

    Using algorithm visualizations in computer science education

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    Development of ATmega 328P micro-controller emulator for educational purposes

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    The paper presents some of our recent results in the field of computer emulation for supporting and enhancing the educational processes. The ATmega 328P micro-controller emulator has been developed as a set of emuStudio emulation platform extension modules (plug-ins). The platform is used at the Department of Computers and Informatics as a studying and teaching support tool. Within the Assembler course, currently, the Intel 8080 architecture and language is briefly described as a preliminary preparation material for the study of Intel x86 architecture, and the Intel 8080 emuStudio emulator module is used here. The aim of this work is to explore the possibility to enrich the course by introducing a more up-to-date and relevant technology and the ATmega is the heart of Arduino – a popular hardware and software prototyping platform. We consider the options to make the process of studying the assembly language principles more attractive for students and using the ATmega AVR architecture, which is broadly deployed in embedded systems, seems to be one of them

    RASP ABSTRACT MACHINE EMULATOR – EXTENDING THE EMUSTUDIO PLATFORM

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    This paper presents the RASP (Random Access Stored Program) abstract machine emulator implemented as a plugin for emuStudio – extendable platform for computer architectures emulation. It consists of three submodules – the CPU emulator (the core of the plugin), main memory for storing RASP machine’s program and data and compiler of RASP assembly language. The compiler is able to translate RASP program source code into the form executable by the emulator. The main goal is to provide a supporting tool for Data Structures and Algorithms, respectively other subjects taught at the Department of Computers and Informatics. In addition to this, its aim is also to contribute to emuStudio platform so as to support its further development. There are not many universal software products for computer emulation flexibly extendable by plugins for new architectures and that is why emuStudio deserves our interest. Its flexibility makes it an ideal study supporting tool
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